1. Field of the Invention
The present invention relates to an information signal processing apparatus for processing an information signal in which a plurality of kinds of signals having offset levels that are different from each other are sequentially allocated.
2. Description of the Related Art
An apparatus for processing an information signal in which a plurality of kinds of signals having different offset levels are sequentially allocated has hitherto been known as, for example, a still-image recording and reproducing apparatus.
In such a still-image recording and reproducing apparatus, color information expressed by the use of two color-difference signals R-Y and B-Y is converted into a color-difference line-sequential signal in which an R-Y signal and a B-Y signal alternately appear every horizontal scanning period, and the information is recorded on a recording medium.
FIG. 1 shows the frequency spectral distribution of signals which have been recorded in this way on a recording medium.
As shown in this figure, an R-Y signal in the color-difference line-sequential signal and a B-Y signal in the same are provided with a certain offset so that they are frequency-modulated in such a manner as to be centered at a frequency f1, e.g. 1.2 MHz, and a frequency f2, e.g. 1.3 MHz, respectively.
On the other hand, a luminance signal is frequency-modulated in such a manner as to have a deviation in which the sync. tip portion is at a frequency f3, e.g. 6.0 MHz, and the white peak portion is at a frequency f4, e.g. 7.5 MHz. An example of the arrangement of the still-image recording and reproducing apparatus is shown in FIG. 2.
In FIG. 2, during recording, a luminance signal which has been clamped by a clamping circuit (not shown) is frequency-modulated by a frequency modulator 1 in such a manner as to have the above-described deviation. Two color-difference signals R-Y and B-Y are converted into a color-difference line-sequential signal by a color-difference line-sequential conversion circuit 2 and are provided with a certain offset, and are then frequency-modulated by a frequency modulator 3.
The thus frequency-modulated luminance signal and color-difference line-sequential signal are added to each other by an adder 4, they pass through a recording amplifier 5 and a recording/reproducing head changeover switch 6 which is connected, during recording, to the R side shown in the figure, and they are then recorded on a magnetic sheet 8 by a magnetic head 7. At this time, the magnetic sheet 8 is rotated by a motor 9 at, for example, the field frequency, and the magnetic head 7 is radially moved, whereby a still-image signal is recorded on concentric recording tracks on the magnetic sheet 8, field by field.
During reproduction, a still-image signal is reproduced from the magnetic sheet 8 by the magnetic head 7, it passes through the recording/reproducing head changeover switch 6 which is connected, during reproducing, to the P side shown in the figure, and it is then amplified by a reproducing amplifier 10. Subsequently, a high-pass filter (HPF) 11 separates only frequency-modulated luminance signal components, and a frequency demodulator 13 demodulates a luminance signal. On the other hand, a low-pass filter 12 separates only frequency-modulated color-difference line-sequential signal components, a frequency demodulator 14 demodulates a color-difference line-sequential signal, and a color-difference simultaneous conversion circuit 15 converts the signal into two simultaneous color-difference signals (R-Y, B-Y).
FIG. /3 shows an example of the arrangement of the color-difference simultaneous conversion circuit 15 shown in FIG. 2.
FIG. 4 is a timing chart showing signals output from various parts of the color-difference simultaneous conversion circuit 15.
In FIG. 3, a reproduced color-difference line-sequential signal which has been output from the frequency demodulator 14 is supplied to sampling circuits 18 and 19 in which offset levels within the horizontal blanking periods are sampled in correspondence with alternate horizontal lines and in synchronization with sampling pulses C and D, respectively, which are generated by a pulse generating circuit 50. The color-difference line-sequential signal input to the circuit 15 is also supplied to clamping circuits 16 and 17 in which an R-Y signal and a B-Y signal are clamped at the same current potential in synchronization with clamping pulses A and B, respectively, which are generated by the pulse generating circuit 50. Subsequently, one of signals output from the clamping circuits 16 and 17 is selected by a switch 20. As a result, the offsets in the input color-difference line-sequential signal are removed.
Subsequently, the output of the switch 20 is input to a 1H delay line 21 and switches 22 and 23. The output of the 1H delay line 21 and the output of the switch 20 are selectively output by the switches 22 and 23 in accordance with a pulse E output from the pulse generating circuit 50, as simultaneously converted R-Y and B-Y signals, respectively.
FIG. 5 shows an example of a known arrangement of the pulse generating circuit 50 shown in FIG. 3.
In FIG. 3, a comparator 24 compares the level of a color-difference signal which has been sampled by the sampling circuit 18 and is held by a capacitor C1 with the level of a color-difference signal which has been sampled by the other sampling circuit 19 and is held by another capacitor C2, and a signal F in accordance with the result of this comparison is output from the comparator 24. The signal F is supplied to an EX OR gate 26-3 shown in FIG. 5. On the other hand, a horizontal synchronizing signal separation circuit 25 in FIG. 5 separates the horizontal synchronizing signal (H SYNC) from the reproduced luminance signal Y. The horizontal synchronizing signal is then frequency-demultiplied by a D-type flip-flop 27 and is output therefrom as a pulse. This pulses output from the flip-flop 27 and the signal F supplied from the comparator 24 and expressing the result of comparison performed therein are then input to the EX OR gate 26-3. If, for instance, it is assumed that, when an R-Y signal is sampled by the sampling circuit 18, the comparator 24 outputs a low-level pulse, whereas, when a B-Y signal is sampled by the sampling circuit 19, the comparator 24 outputs a high-level pulse, the EX OR gate 26-3 outputs a pulse E shown in FIG. 4. This pulse E is then supplied to an inverter 26-5 and an AND gate 26-4, and the AND gate 26-4 and an AND gate 26-6 output a pulse B for clamping the B-Y signal and a pulse A for clamping the R-Y signal, respectively.
Further, in the pulse generating circuit 50, a BF (buffer flag) signal generating circuit 26 generates a pulse BF, shown in FIG. 4, in synchronization with the horizontal synchronizing signal, and the BF pulse is supplied to AND gates 26-1 and 26-2. In this way, sampling pulses C and D for sampling the R-Y and B-Y signals are formed, and they are supplied to the sampling circuits 18 and 19, respectively.
With the above-described known arrangement of the pulse generating circuit 50 of the color-difference simultaneous conversion circuit 15, however, two kinds of sampling pulses, two kinds of clamping pulses, and one kind of pulse for changing over the switches 20, 22 and 23 are formed; that is, pulses of five kinds in all are formed. Thus, the circuit arrangement has been inevitably complicated for generating these pulses.